The present application relates generally to an improved data processing apparatus and method and more specifically to mechanisms for providing an application managed translation cache.
In modern computing devices, some measure of memory virtualization is utilized. With memory virtualization, applications typically utilize addresses within their own address space which is virtualized from the physical memory addresses. As a result, address translation between effective addresses (or virtual addresses) known to the application, and referring to addresses in an application address space, and physical memory addresses (or real addresses) used to specifically access the physical memory locations, i.e. in a physical address space, is required. In order to make such address translations more efficient, hardware based caches and accelerators, such as translation lookaside buffers and the like, have been developed to store translations for faster access. Such caches and accelerators are populated by system level trusted hardware or software.